1. Field of the Invention
The present invention relates generally to the formation of strained semiconductor layers in the field of semiconductor manufacturing, and relates specifically to the formation of strained silicon on silicon germanium buffer layers.
2. Description of the Related Art
Strained semiconductor materials advantageously provide improved electrical carrier mobility properties as compared to relaxed semiconductor materials, thus increasing the speed at which semiconductor circuits can operate. A semiconductor layer is said to be “strained” when it is constrained to have a lattice structure in at least two dimensions that is the same as that of the underlying single crystal substrate, but different from its inherent lattice constant. Lattice strain occurs because the atoms in the deposited film depart from the positions normally occupied when the material is deposited over an underlying structure having a matching lattice structure. The degree of strain is related to several factors, including the thickness of the deposited layer and the degree of lattice mismatch between the deposited material and the underlying structure.
Strained semiconductor layers can be formed by epitaxially depositing silicon over a silicon germanium buffer layer. Silicon germanium films are used in a wide variety of semiconductor applications, such as in microelectronics fabrication. Because SiGe has a larger lattice constant than silicon, when epitaxial SiGe deposition occurs over silicon (such as during deposition on a silicon wafer), the epitaxially deposited SiGe is “strained” to the smaller underlying silicon lattice. If a strained silicon layer is to be deposited over the SiGe layer, the SiGe buffer layer should first be “relaxed” so that the silicon layer deposited thereover will be strained. In particular, because a strained SiGe layer has the dimensions of the underlying silicon lattice, a silicon layer deposited over a strained SiGe layer will not be strained. In contrast, a silicon layer deposited over a “relaxed” SiGe layer will be strained to conform to the larger underlying SiGe lattice. Thus, a strained silicon layer can be produced by epitaxially depositing silicon over a relaxed SiGe layer.
There are a number of approaches to forming a relaxed SiGe layer over silicon. In one approach, a SiGe layer is deposited beyond the “critical thickness.” As the thickness of a strained SiGe layer increases beyond a certain “critical thickness”, defects in the crystal structure of the strained SiGe layer appear, thereby inducing relaxation. After relaxation occurs, the degree of strain present in the SiGe layer is related to the amount of misfit dislocation generated in the layer during relaxation, which is a function of the elastic energy of the layer and the activation energy for dislocation nucleation and gliding. The critical thickness depends on a variety of factors, including growth rates, growth temperature, germanium concentration, and the number of defects within the layer underlying the SiGe layer.
In another approach, a graded SiGe buffer layer is deposited, with an increasing concentration of Ge from the underlying Si to the top surface. Unfortunately, when a thick graded buffer (“TGB”) structure is grown, relaxation is often accompanied by vertically propagating threading dislocations and misfit dislocations. This occurs as a result of the lattice mismatch between the silicon substrate and the SiGe. Threading dislocations that are formed in the buffer layer propagate up into the overlying layer of strained semiconductor material, typically strained silicon, which can adversely affect device operation. Additionally, the surface of the graded buffer structure roughens as a function of the composition, leading to very high RMS surface roughness values.
By using various techniques during grading of the TGB structure, these deleterious effects can be reduced. For example, it has been shown that a linear change in germanium concentration at a grade rate of about 10% per micron produces a reduced defect level. While this method may be an improvement, the layers still suffer from a large number of threading dislocations and pile ups (a conglomeration of threading dislocations). Defect density for this method has been reported to be in the range of about 105/cm2 for threading dislocations and pile up counts in excess of 20/cm (Fitzgerald et al. Applied Physics Lett. 69 (7) 811, 1991). In addition, the layers still have a high roughness. Other examples of methods that have been tried to reduce defects include the use of strained super lattice structures to pin the threading dislocations (Obata et al. J. Appl. Phys. 81,199 (1997)) and the insertion of constant composition layers to pin threading dislocations at the interface.